14f07cc638
Architecture choice: separate the register map / business logic from the
physical transport. TrydanModbusMaster (abstract QObject) holds:
- the complete ReadRegister / WriteRegister enums with addresses
- float32 Big/Big decode helpers (memcpy pattern, matches pymodbus
BinaryPayloadDecoder byteorder=Endian.Big wordorder=Endian.Big)
- all last-polled cached values accessible via simple getters
TrydanModbusTcpMaster (concrete, Étape 1) wraps libnymea-modbus
ModbusTcpMaster. Each register read is a distinct FC3(addr, 2)
transaction via a recursive runReadSequence/doNextRead pattern —
never a block read, because the V2C firmware's register windows
overlap (0x0BC2 and 0x0BC3 each span 2 registers, so a range read
starting at 0x0BC2 for ≥3 registers returns garbage for the second
value). Writes use FC6 (single uint16, not float).
writeCompleted(quint16 address, bool success) carries the originating
register address so that concurrent background writes (e.g. PauseDynamic
from the conflict manager firing during an action) do not interfere with
action handlers waiting on a specific register's acknowledgement.
0x177E (Dynamic) is intentionally absent from WriteRegister: writing it
to 0 silences ChargePower telemetry even though the charger keeps running.
cf. evcc charger/trydan.go and github.com/evcc-io/evcc/issues/28047.
Étape 2 (RTU) will add TrydanModbusRtuMaster on the same interface;
no changes to plugin or register logic will be required.
Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
108 lines
4.0 KiB
C++
108 lines
4.0 KiB
C++
// SPDX-License-Identifier: GPL-3.0-or-later
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#ifndef TRYDANMODBUSTCPMASTER_H
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#define TRYDANMODBUSTCPMASTER_H
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#include "trydanmodbusmaster.h"
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#include <QHostAddress>
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#include <QList>
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#include <QPair>
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#include <functional>
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class ModbusTcpMaster;
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class QModbusReply;
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/*!
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* \brief Modbus TCP transport for the V2C Trydan (Étape 1).
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*
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* Wraps a libnymea-modbus ModbusTcpMaster. All register reads are individual
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* FC3 transactions of exactly 2 registers — never batched — to avoid the
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* overlapping-window firmware bug of the V2C Trydan.
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* cf. modbus.py _read_register and AGENTS.md § Décodage lecture.
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*
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* Writes use FC6 (single-register, uint16, via ModbusTcpMaster::sendWriteRequest).
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*
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* Étape 2 (RTU) will add TrydanModbusRtuMaster on the same TrydanModbusMaster
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* interface without touching this file.
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*/
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class TrydanModbusTcpMaster : public TrydanModbusMaster
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{
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Q_OBJECT
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public:
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/*!
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* \param address IP address of the charger
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* \param port Modbus TCP port (default 502)
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* \param slaveId Modbus unit ID (always 1 for Trydan)
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*/
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explicit TrydanModbusTcpMaster(const QHostAddress &address,
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quint16 port,
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quint16 slaveId,
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QObject *parent = nullptr);
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~TrydanModbusTcpMaster() override;
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/*! \brief Underlying TCP master — exposed so the plugin can update the host address. */
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ModbusTcpMaster *modbusTcpMaster() const;
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/*! \brief Update the target IP without reconnecting (call reconnectDevice() separately). */
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void setHostAddress(const QHostAddress &address);
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void connectDevice() override;
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void disconnectDevice() override;
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bool initialize() override;
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bool update() override;
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void writePauseState(quint16 value) override;
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void writeLock(quint16 value) override;
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void writeIntensity(quint16 amps) override;
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void writePauseDynamic(quint16 value) override;
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private:
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// Callback type for a single 2-register read result
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using ReadCallback = std::function<void(bool ok, quint16 high, quint16 low)>;
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using ReadStep = QPair<quint16, ReadCallback>;
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/*!
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* \brief Execute \a steps sequentially, one FC3 read per register pair.
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*
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* The sequence aborts on the first failed read; \a onDone receives false in
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* that case and the error counter is incremented. On full success \a onDone
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* receives true and the error counter is reset.
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*
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* Sequential execution is required because concurrent reads from the same
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* slave on a Modbus TCP connection would not be incorrect per protocol, but
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* the firmware's overlapping register windows make ordering critical.
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*/
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void runReadSequence(QList<ReadStep> steps, std::function<void(bool)> onDone);
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void doNextRead(QList<ReadStep> steps, int index, std::function<void(bool)> onDone);
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/*!
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* \brief Send an FC6 (Write Single Register) request and invoke \a callback.
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* FC6 is used for all writes per the V2C spec (modbus.py _write_register).
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* \param callback Receives (address, success) so callers can emit writeCompleted
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* with the originating register address, enabling action handlers
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* to distinguish expected writes from background writes.
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*/
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void writeFC6(quint16 address, quint16 value,
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std::function<void(quint16 addr, bool ok)> callback);
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void onConnectionStateChanged(bool connected);
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/*! \brief Increment the error counter and mark unreachable once it hits the limit. */
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void handleError();
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QList<ReadStep> buildInitSteps();
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QList<ReadStep> buildPollSteps();
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ModbusTcpMaster *m_modbusTcpMaster = nullptr;
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quint16 m_slaveId = 1;
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int m_errorCount = 0;
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bool m_updating = false;
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bool m_initializing = false;
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static constexpr int k_errorLimit = 5;
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};
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#endif // TRYDANMODBUSTCPMASTER_H
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